Architectural optimization for microelectronic packaging

The aim of this paper is to provide a methodical approach for architectural optimization of power microelectronic devices. Because critical parameters of electronic devices are linked with reliability, architectural optimization, selection of the geometrical parameters of device and optimization of these parameters by iteration method associated by numerical analysis of reliability have to be achieved. In this way, this paper discusses about a methodical and numerical approach for the optimization of reliability in electronic devices, in particular the influence of geometrical parameters on the device reliability.