Modelling of metal–insulator–semiconductor devices featuring a silicon quantum well

A straight-forward model of a metal–insulator–semiconductor (MIS) device that accommodates an arbitrarily defined insulating potential barrier is described. Using the model, current density–voltage (J–V) curves of MIS devices featuring a single silicon (Si) quantum well (QW) embedded between silicon dioxide (SiO2) insulating barriers (Si:QW-MIS devices) are simulated. Furthermore, the electron current density is examined as a function of carrier energy. In the case of a 4 nm QW, a current step is predicted due to rising of the first quasi-bound state of the QW above the conduction band edge of the Si semiconductor substrate. Defects in the SiO2 barriers are simulated indirectly by varying the electron effective tunnelling mass in SiO2. Reductions in the SiO2 electron effective tunnelling mass cause a shift in the position of the current step. An explanation for this shift is provided by taking into account the response of carrier populations at the Si substrate surface to changes in the magnitude of electron tunnelling current.