Fabrication of two-dimensional in-plane gate transistors by focused ion beam doping

In-plane-gate (IPG) transistors have been fabricated using focused ion beam implantation doping of GaAs/In0.1Ga0.9As/Al0.35Ga0.65As heterostructures. At room temperature in the dark, the devices show good transistor characteristics and—in contrast to IPG transistors defined by insulation writing using ion implantation—the observed enhancement behavior is very good. For typical devices the source–drain current in the saturation region of View the MathML source at zero gate voltage could be increased by one order of magnitude to View the MathML source by a positive gate voltage of View the MathML source. This improvement in the enhancement behavior with respect to IPG transistors defined by insulation writing is attributed to the higher electronic transport quality in the edge regions of the channel. The gate leakage current for typical operation parameters is below View the MathML source and at a gate voltage of View the MathML source the channel is completely pinched off.