Spin relaxation and tunnel magnetoresistance of a ferromagnet/superconductor/ferromagnet single-electron tunneling transistor

We theoretically study the spin relaxation and tunnel magnetoresistance (TMR) of ferromagnet/superconductor/ferromagnet single-electron tunneling transistors with a special attention to the parity effect. We show that the spin accumulation is forbidden in the plateau region even at finite bias voltage. However, the information of injected spin is carried by an excess electron and TMR exists. We also show that the TMR increases with decreasing the size of the superconducting island.