Abstract :
A binary-to-residue encoder design that encodes the binary value into modulo (2/sup n/+-2/sup k/+1) residue digits is introduced. Such encoders are important for the newly introduced moduli set: (2/sup n/,2/sup n/-1,2/sup n/+1,2/sup n/-2/sup k/+1,2/sup n/+2/sup k/+1), where k is a positive integer, and n=2k-1. The proposed design utilises n bit carry-save adders and carrypropagate adders. A VLSI layout implementation based on 0.5 (mu)m CMOS technology is presented. The area and delay requirements of the new encoders are shown to be less than another reported encoder.
