Back-gated MOSFETs with controlled silicon thickness for adaptive threshold-voltage control

Experimental results for back-gated thin silicon transistors that allow adaptive threshold-voltage control and exhibit low drain-induced-barrier-lowering due to improved electrostatics of the geometry are reported. The implementation of the back-gate is achieved by a low-temperature bonding process capable of tens of nanometre silicon channel thickness, good surface and bulk quality. The technology is compatible with mainstream silicon CMOS processing technology.