Scaling first-principles plane-wave codes to thousands of processors Original Research Article

We present some novel computational methods for scaling up first-principles plane-wave based codes to thousands of processors avoiding communication and latency bottlenecks. This allows our code to scale to more processors and larger systems than previous plane-wave codes that are typically limited in scaling to a few hundred processors. We present performance data for the plane-wave pseudopotential code PARATEC (PARAllel Total Energy Code) on the IBM SP, Cray X1, NEC SX6 Earth Simulator in Japan and the SGI Altix. This data shows how plane-wave codes can be scaled to the teraflop regime even though they require global communications on parallel machines.