Title of article :
Mapping of neural network models onto massively parallel hierarchical computer systems
Author/Authors :
Mahapatra، S. نويسنده , , Mahapatra، R.N. نويسنده , , Chatterji، B.N. نويسنده ,
Issue Information :
روزنامه با شماره پیاپی سال 1999
Pages :
-918
From page :
919
To page :
0
Abstract :
This paper considers the past, present and future of architectures for high performance image processing:. After reviewing a number of representative designs of image processing-specific architectures, four current approaches arc considered in more detail: standard microprocessor technology. DSP processors, parallel processing and dynamically reprogrammable hardware in the form of Field Programmable Gate Arrays (FPGAs). A final section considers which approaches are more likely to be successful in the future. © 1999 Published by Elsevier Science B. V. All rights reserved.
Keywords :
Training set parallelism , Hypernet , Subnets , Multilayer perceptron , Speedup performance , Back-propagation algorithm
Journal title :
Journal of Systems Architecture
Serial Year :
1999
Journal title :
Journal of Systems Architecture
Record number :
11747
Link To Document :
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