Implementation of two-dimensional systolic algorithms for multi-layered neural networks

This paper considers the past, present and future of architectures for high performance image processing:. After reviewing a number of representative designs of image processing-specific architectures, four current approaches arc considered in more detail: standard microprocessor technology. DSP processors, parallel processing and dynamically reprogrammable hardware in the form of Field Programmable Gate Arrays (FPGAs). A final section considers which approaches are more likely to be successful in the future. © 1999 Published by Elsevier Science B. V. All rights reserved.