Title of article :
Process characterisation of hot-carrier-induced (beta) degradation in bipolar transistors for BiCMOS
Author/Authors :
Arshak، A. نويسنده , , McDonagh، D. نويسنده , , Arshak، K.I. نويسنده , , Doyle، D. نويسنده , , Harrow، I. نويسنده ,
Issue Information :
روزنامه با شماره پیاپی سال 1999
Pages :
-478
From page :
479
To page :
0
Abstract :
This paper investigates the effect of various process parameters on the variation in forward current gain lifetime caused by hot carrier generation of BiCMOS bipolar transistors. Statistical process control and statistical designed experiments were used in this evaluation. The device lifetime in reverse bias operation was calculated from the forward current gain. Various process parameters were examined in this work, i.e.. the intrinsic base implant dose and energy, selective collector implant dose, collector plug dose, spacer etch ratio, overetch thickness of nitride spacer and emitter poly etch time. It was deduced that high current gain lifetime can be obtained with high base implant doses, high base implant energies, long bulk nitride etch times and short emitter poly etch times. (C) 1999 Elsevier Science Ltd. All rights reserved.
Keywords :
Solder fatique , Chip Scale Package , Viscoelasticily , Viscoplasticity , Finite element method , Extrapolation , Creep
Journal title :
MICROELECTRONICS RELIABILITY
Serial Year :
1999
Journal title :
MICROELECTRONICS RELIABILITY
Record number :
12939
Link To Document :
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