Title of article
Modelling and verification of delay-insensitive circuits using CCS and the Concurrency Workbench
Author/Authors
Hemangee K. Kapoor، نويسنده , , Mark B. Josephs، نويسنده ,
Issue Information
دوهفته نامه با شماره پیاپی سال 2004
Pages
4
From page
293
To page
296
Keywords
formal methods , Specification languages , formal verification , Asynchronous logic
Journal title
Information Processing Letters
Serial Year
2004
Journal title
Information Processing Letters
Record number
129869
Link To Document