Author/Authors :
Piry، M. نويسنده Department of Electrical Engineering, Shahid Rajaee Teacher Training University, Tehran, Iran. , , Khanjanimoaf، M. نويسنده Department of Electrical Engineering, Shahid Rajaee Teacher Training University, Tehran, Iran. , , Amiri، P. نويسنده Department of Electrical Engineering, Shahid Rajaee Teacher Training University, Tehran, Iran. ,
Abstract :
Class-AB circuits, which are capable of dealing with currents several orders of
magnitude larger than their quiescent current, are good candidates for low-power and high
slew-rate analog design. This paper presents a novel topology of a class AB Flipped
Voltage Follower (FVF) that has better slew rate and the same power consumption as the
conventional class-AB FVF buffer previously presented in literature. It is thus suitable for
low-voltage and low-power stages requiring low bias currents. These buffers have been
simulated using 0.5 ?m CMOS Technology models provided by IBM. The buffer consumes
16 ?A from a 0.9 V supply and has a bandwidth of 52 MHz with an 18 pF load. It has a
slew rate of 10.3 V/?s and power consumption of 36 ?w.
