High level performance metrics for FPGA-based multiprocessor systems

New high performance architectures combining high and low level design techniques are widely used today, and FPGA platforms offer excellent solutions for this kind of system. There are a lot of multiprocessor systems implemented on FPGAs but the performance metrics usually considered with the traditional multiprocessors have not been adapted for systems on chip yet. For these high performance systems the classic hardware metrics, such as area, cost and minimum period, are still used; but sometimes they do not provide enough information to guide users and designers in their decisions. In this paper, new definitions for high level performance metrics such as efficiency, scalability and robustness are proposed to overcome these limitations with FPGA-based multiprocessor systems.