A 4-Gbps/pin transceiver with a multi-level simultaneous bi-directional scheme for serial link applications

This paper presents a simultaneous 4-level bi-directional transceiver, which performs data rate of eight times of the clock rate without the need of a high-speed clock generator. The proposed transceiver was fabricated using a 0.11 μm CMOS process in 900 × 300 μm2 and performs data rate of 4 Gbps/pin with the use of a 500 MHz clock. The main features of the I/O interface circuit are 4-level push–pull linear output drivers, multi-level auto-impedance control, hierarchical multi-reference selected sampling, a self-biased wide common-mode range differential amplifier and an impedance-controlled reference voltage generator. The transceiver performs data rate of 4 Gbps/pin with 180 mV × 690 ps passing eye-windows on the channel over 1.8 V supply voltages.