Author/Authors :
Jang، نويسنده , , Eun-Jung and Lee، نويسنده , , Seung-Yoen and Kim، نويسنده , , Hye-Jin and Shin، نويسنده , , Hyungsoon and Lee، نويسنده , , Seungjun and Kim، نويسنده , , Daejung، نويسنده ,
Abstract :
We propose a novel sensing circuitry based on the new cell structure. Proposed sense amplifier detects small voltage difference between two MTJ’s and develops it to full rail-to-rail voltage while maintaining small voltage difference on TMR cells by limiting gate voltage of the switch transistor between a pair of bit lines and a sense amplifier. The sense amplifier is small enough to fit into each column that the whole data array on selected word line is activated as in DRAMs for high-speed read-out by changing column addresses only. We verified the new sensing scheme in a 0.35 μm logic technology.
Keywords :
MRAM , Sense amplifier , Synchronous , high speed