Author/Authors :
Chun، نويسنده , , Ki-Chul and Sim، نويسنده , , Jae-Yoon and Yoon، نويسنده , , Hongil and Lee، نويسنده , , Hyun-Seok and Hong، نويسنده , , Sang-Pyo and Lee، نويسنده , , Kyu-Chan and Yoo، نويسنده , , Jei-Hwan and Seo، نويسنده , , Dong-Il، نويسنده ,
Abstract :
A 1.8 V low-voltage and low-power 128 Mb mobile SDRAM is designed and fabricated for hand-held, battery-operated electronic devices with a 0.15-μm CMOS technology. As an essential low-voltage circuit, a triple pumping scheme is proposed to generate a stable boosted voltage whose level exceeds over twice the supply voltage and which is required for the boosted word-line bias. In addition, to convert the bit-line data to a low-voltage CMOS level, a new NMOS and PMOS hybrid folded current sense amplifier with dual-path current sensing scheme is proposed to obtain the stable I-to-V gain as well as to improve the low-voltage margin.
Keywords :
Low voltage , Pumping circuit , Current sense amplifier , DRAM , memory , low power , Mobile DRAM
