Title of article :
Unavoidability Routine Enrichment for Real-Time Embedded Systems by Using Cache-Locking Technique
Author/Authors :
Shankar، M. نويسنده Bharath University Chennai , , Sridar، Dr.M. نويسنده Bharath University Chennai , , Rajani، Dr.M. نويسنده Bharath University in Chennai ,
Issue Information :
روزنامه با شماره پیاپی 1 سال 2012
Pages :
5
From page :
41
To page :
45
Abstract :
Abstract— In multitask, preemptive real-time systems, the use of cache memories make difficult the estimation of the response time of tasks, due to the dynamic, adaptive and non predictable behavior of cache memories. But many embedded and critical applications need the increase of performance provided by cache memories. Recent studies indicate that for application-specific embedded systems, static cache-locking helps determining the worst case execution time (WCET) and cache-related pre-emption delay. The determination of upper bounds on execution times, commonly called Worst-Case Execution Times (WCETs), is a necessary step in the development and validation process for hard real-time systems. This problem is hard if the underlying processor architecture has components such as caches, pipelines, branch prediction, and other speculative components. This article describes different approaches to this problem and surveys several commercially available tools and research prototypes
Journal title :
International Journal of Electronics Communication and Computer Engineering
Serial Year :
2012
Journal title :
International Journal of Electronics Communication and Computer Engineering
Record number :
1992675
Link To Document :
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