A self adjustment technique minimizing channel to channel variations in VLSI readout chips

Modern VLSI readout chips for strip and pixel detectors contain many electronic channels which all should behave exactly alike in order to give the optimal performance. However, good matching is often very difficult to achieve due to many design constraints. In this paper, a simple concept for automatic adjustment of important VLSI circuit properties simultaneously in all readout channels is presented. The tuning is performed by applying a test injection pulse and, if necessary, a reference signal to all cells simultaneously. A simple circuit in each channel adjusts the control voltage on a storage capacitor until matching is optimal. An application of this concept in a self adjusting delay circuit is presented and other possible applications are discussed.