Design requirements and first results of an LHC adequate analogue block for the CMS pixel detector

The high magnetic field of 4 T together with the small radius requirement for a good impact parameter resolution lead to considerable particle fluences in the pixel detector of CMS. We have exposed silicon pixel detectors to hadronic particle fluences of 1015 tracks/cm2 that are expected to be reached after the first six years of LHC operation. The detectors are based on n-pixels with a pixel size of 125 μm × 125 μm that should allow operation in a mode of partial depletion, after type inversion has occurred. The observed behaviour is the basis for the design requirements of an LHC adequate analogue block. Such a pixel analogue front end block has to deal with increasing detector leakage currents, reduced signal charge and still must be able to provide a robust hit discrimination associated to the correct LHC bunch crossing. The first results of a chip in DMILL technology with pixel unit cells that try to meet LHC requirements are presented. The analogue block properties like noise, power and leakage current absorption are given together with the time walk properties of the hit discrimination that is based on a zero crossing technique.