Radiation hardened transistor characteristics for applications at LHC and beyond

The high-radiation environment at the LHC will require the use of radiation-hardened microelectronics for the read out of inner detectors. Two such technologies are a Harris bulk CMOS process and the DMILL mixed-technology process. Transistors have been fabricated in both of these and have been tested before and after irradiation to 10 Mrads, the total dose expected in the innermost silicon microstrip layers. Several processing runs of Harris transistors have been carried out and samples from one have also been irradiated to 100 Mrads. A preamplifier-shaper circuit, to be used for read out of the CMS microstrip tracker, has been tested and the noise performance is compared with individual transistors.