Development of a detector-compatible JFET technology on high-resistivity silicon

We report on the development of a radiation-detector compatible JFET technology on high-resistivity silicon for monolithic integration of detectors and front-end electronics. A dedicated test-chip has been designed and fabricated for process and device characterization. Results from the electrical characterization of a first fabrication run show that good values of detector leakage current (≈1 nA/cm2) can be obtained in spite of the relatively high thermal budget characterizing the process. As far as the JFET performance is concerned, a problem of insufficient device isolation at high substrate voltages has been evidenced. A second run is currently being carried on with the aim of optimizing the JFET structure.