Low-power bipolar front-end circuit for VLSI detectors read-out

The paper presents the analog section of a readout electronics for multichannel detector systems using VLSI bipolar technology. The charge amplifier and the fast shaper (peaking time 20 ns) are designed for minimum noise (ENC<650 electrons rms for 5 pF detector capacitance), small non-linearity (<0.1% over 4 m.i.p. dynamic range), single power supply (2.8 V) and minimum power dissipation (<480 μW/channel). A Proportional To Absolute Temperature (PTAT) current source is used for stable biasing. The preamplifier reset is made continuously through a MOS diode.