Author/Authors :
Christian، نويسنده , , D.C and Appel، نويسنده , , J.A and Cancelo، نويسنده , , G and Kwan، نويسنده , , S and Hoff، نويسنده , , J and Mekkaoui، نويسنده , , T and Srage، نويسنده , , J and Yarema، نويسنده , , R and Zimmermann، نويسنده , , S، نويسنده ,
Abstract :
A description is given of the R&D program underway at Fermilab to develop a pixel readout ASIC appropriate for use at the Tevatron collider. Results are presented from tests performed on the first prototype pixel readout chip designed at Fermilab, and a new readout architecture is described.
