Frequency Divider Digital CMOS Parallel Counter Using Pass Transistor Logic.

Counters are widely considered as essential building blocks for a variety of circuit operations such as programmable frequency dividers, shifters, code generators, memory select management, and various arithmetic operations. Since many applications are comprised of these fundamental operations, much research focuses on efficient counter architecture design. In this paper we design a frequency divider counter design using pass transistor logic circuit technique. The proposed counter is a 4 bit pass transistor base counter, which sequences through a fixed set of pre assigned count states, of which each next count state represents the next counter value in sequence. The counter frequency is greatly improved by reducing the gate count on all timing paths to two gates using pass transistor circuit design techniques. In our work the counter operating frequency is improved by using a parallel counter architecture of pass transistor base flipflops. This is proceeded to eliminate the carry chain delay and reduce AND gate fan-in and fan-out. The proposed counter is design for low-power and high-speed applications.