Author/Authors :
Takubo، نويسنده , , Yosuke and Miyamoto، نويسنده , , Akiya and Ikeda، نويسنده , , Hirokazu and Yamamoto، نويسنده , , Hitoshi and Itagaki، نويسنده , , Kennosuke and Nagamine، نويسنده , , Tadashi and Sugimoto، نويسنده , , Yasuhiro، نويسنده ,
Abstract :
The concept of FPCCD (Fine Pixel CCD) whose pixel size is 5 × 5 μ m 2 has been proposed as vertex detector at ILC. Since FPCCD has 128 ×20,000 pixels in one readout channel, its readout poses a considerable challenge. We have developed a prototype of readout ASIC to readout the large number of pixels during the inter-train gap of the ILC beam. In this paper, we report the design and performance of the readout ASIC.
Keywords :
CCD , Readout ASIC , Charge sharing ADC , CMOS , iLC
