A 130 nm CMOS mixed mode front end readout chip for silicon strip tracking at the future linear collider

A 130 nm mixed (analog and digital) CMOS chip intended to read silicon strip detectors for future linear collider experiments was developed. Currently under testing, this chip has been optimized for a silicon micro-strip tracking device. It includes 88 channels of a full analog signal processing chain with the corresponding digital control and readout. Every analog channel includes (i) a low noise charge amplifier and integration with long pulse shaping, (ii) an eight by eight positions analog sampler for both storing successive events and reconstructing the full pulse shape, and (iii) a sparsifier performing analog sum of three adjacent inputs to decide whether there is signal or not. The whole system is controlled by the digital part, which allows configuring all the reference currents and voltages, drives the control signals to the analog memories, records the timing and channel information and subsequently performs the conversion to digital values of samples. The total surface of the circuit is 10×5 mm2, with each analog channel occupying an area of 105×3500 μm2, and the remaining space of about 9000×700 μm2 being filled by the analog channels on the silicon.