30Mrad(SiO2) radiation tolerant pixel front end for the BTEV experiment

The FPIX project is an effort underway at Fermilab to develop a pixel detector ASIC appropriate for use in the BTEV experiment. The most ambitious aspect of this project is that all data from all hit pixels must be read out every beam crossing (132 ns) for use in the lowest level trigger system. Included in each 50 μm×400 μm pixel is a three-bit analog to digital converter which provides pulse height information to improve resolution. Given the proximity to the beam, the chips must be radiation tolerant. Rather than focusing efforts on a rad-hard technology, the choice has been made to use the inherent radiation tolerance of deep submicron processes with radiation tolerant design techniques. This paper discusses both the design and the radiation tolerance of the FPIX pixel cell.