Implementation and synchronisation of the First Level Global Trigger for the CMS experiment at LHC

The hardware implementation of the First Level Global Trigger for the Compact Muon Solenoid experiment at the CERN Large Hadron Collider is described. Special emphasis is given to the algorithm logic and the synchronisation procedure. Up to 128 different trigger algorithms are calculated in parallel by the Global Trigger (GT) for every beam crossing taking place at 25 ns intervals. Already, at the first trigger level the GT is able to select complex topological event configurations by performing fast calculations. The electronics is based on VME and relies completely on Field Programmable Gate Arrays (FPGA) technology. The electronic circuits are optimised for speed by exploiting, to a great extent, the small look-up tables provided in the FPGA chips.