Author/Authors :
Abbrescia، نويسنده , , M and Colaleo، نويسنده , , A and Iaselli، نويسنده , , G and Loddo، نويسنده , , F and Maggi، نويسنده , , M and Marangelli، نويسنده , , B and Natali، نويسنده , , S and Nuzzo، نويسنده , , S and Pugliese، نويسنده , , G and Ranieri، نويسنده , , A and Romano، نويسنده , , F and Altieri، نويسنده , , S and Belli، نويسنده , , G and Bruno، نويسنده , , G and Guida، نويسنده , , R and Merlo، نويسنده , , M and Ratti، نويسنده , , S.P. and Riccardi، نويسنده ,
Abstract :
Neutrons from a reactor and from a cyclotron have been used to characterise the CMS Resistive Plate Chambers (RPCs) front-end chip to neutron-induced damaging events. Single Event Upset (SEU) cross-sections have been measured up to 60 MeV for different chip thresholds. Tests at a reactor were done with an integrated fast (En>3 MeV) neutron fluence of 1.7×1010 cm−2 and a thermal neutron fluence of 9.5×1011 cm−2. High-energy neutrons from a cyclotron were used up to a fluence of 1012 cm−2. Data indicate the existence of a chip SEU sensitivity already at thermal energy and a saturated SEU cross-section from 3 to 60 MeV. Values of the SEU cross-sections from the thermal run well agree with those obtained by another CMS group that uses the same technology (0.8 μm BiCMOS) though with different architecture. Cross-sections obtained with fast neutrons (from 3 MeV to about 10 MeV) are consistently higher by one order of magnitude compared to the thermal one. The average time between consecutive SEU events in each chip of the CMS barrel RPCs can be estimated to be 1 h.
