Author/Authors :
Richter، نويسنده , , R.H. and Andricek، نويسنده , , L. and Fischer، نويسنده , , P. and Heinzinger، نويسنده , , K. and Lechner، نويسنده , , P. and Lutz، نويسنده , , G. and Peric، نويسنده , , I. and Reiche، نويسنده , , M. and Schaller، نويسنده , , G. and Schnecke، نويسنده , , M. and Schopper، نويسنده , , F. and Soltau، نويسنده , , H. and Strüder، نويسنده , , L. and Treis، نويسنده , , J. and Trimpl، نويسنده , , M. and Ulrici، نويسنده , , J. and W، نويسنده ,
Abstract :
The performance requirements of vertex detectors for future linear collider experiments is very challenging especially for the detectorʹs innermost sensor layers. The DEPleted Field Effect Transistor (DEPFET) combining detector and amplifier operation is capable to meet these requirements. A silicon technology is presented which allows production of large sensor arrays consisting of linear DEPFET detector structures. The envisaged pixel array offers a low noise and low power operation. To ensure a high radiation length a thinning technology based on direct wafer bonding is proposed.
Keywords :
Low noise operation , DEPFET , Vertex detector , Linear collider , Active pixel detector
