On thermal activation of interface-generated currents in high-resistivity silicon devices

In this study Si/SiO2 interface properties of high-resistivity, detector-grade silicon are characterized, analyzed and compared. Wafers cut from the same ingots were processed by various technologies with the same mask set to emphasize the comparative nature of the study. Samples with resistivity in the range of 2–15 kΩ cm and orientations 〈1 1 1〉 and 〈1 0 0〉 were used. It is shown that the thermal activation energies of the surface-generated currents are similar in all the process technologies and wafer orientations. The concentration of the generation centers is shown to be process and orientation dependent. Current–voltage curves are shown to be somewhat different compared to the “textbook” case and computer simulation results are used to explain the difference.