Author/Authors :
Holland، نويسنده , , S.E and Dawson، نويسنده , , K.S. and Palaio، نويسنده , , N.P. and Saha، نويسنده , , J. and Roe، نويسنده , , N.A. and Wang، نويسنده , , G.، نويسنده ,
Abstract :
We describe a fabrication strategy to produce fully depleted, back-illuminated charge-coupled devices (CCDs). Wafers are partially processed at a commercial foundry using standard processing techniques. The wafers are then thinned to the final desired thickness, and the processing steps necessary to produce back-illuminated devices are performed in our laboratory. The CCDs are then probed at wafer level, and we describe our techniques to screen for gate insulator flaws as well as defects on the back side of the wafer that are important for fully depleted devices.
Keywords :
Charge-coupled device , High-resistivity silicon , Fully depleted , Back illuminated , Fabrication techniques