Side-gated GaAsAlGaAs double barrier resonant tunnelling diodes formed by patterned substrate regrowth

MBE regrowth on patterned np-GaAs wafers has been used to fabricate GaAsAlGaAs double barrier resonant tunnel diodes with a side-gate in the plane of the quantum well. The first growth is of a n+-GaAs collector layer followed by a p+-GaAs layer. The p-type layer is then etched away by ex-situ processing forming vias of physical diameters between 0.5 and 20 μm. The wafer is then returned to the growth chamber where the double barrier structure and a top n+-GaAs emitter layer are grown. -GaAs isolates the emitter from the collector except in the region of the etched via. By contacting the p+-GaAs layer we may use it as a side-gate to modulate the effective tunnel area. For a 1 μm physical diameter diode the peak current is reduced by more than 95% for a side-gate voltage of −2.0 V. If scaling by comparison with a large diameter diode is carried out, the estimated tunnel diameter can be varied between 400 and 70 nm. Conductance data for different gate voltages shows the appearance of extra peaks as the gate voltage approaches −2.0 V. Preliminary results show that the spacing of this structure increases as the side-gate bias becomes more negative, therefore we believe this to be evidence of the formation of quasi-zero-dimensional states in the tunnel region.