Periphery protection for silicon carbide devices: state of the art and simulation

Silicon carbide (SiC) is well known for its large potentiality for power device applications. SiC presents a high critical electric field, allowing small dimensions and relatively high doping levels, favorable for reduced power losses in the on-state together with high blocking voltage capability, SiC has a wide band-gap, inducing very low intrinsic carrier concentrations even at high temperature, and consequently allows very low leakage currents and off-state power losses. The present paper focuses on problems related to the high voltage capability of SiC components. After dealing with the bulk breakdown voltage of a SiC semi-infinite parallel-plane abrupt junction, a short review of the methods allowing the potential distribution spreading near the periphery of the real junction is given. Some methods have been implemented and the edge-termination protection has been optimized by the way of numerical simulation. This includes equipotential rings, junction termination extension as planar protections, and MESA as an etched-contour periphery. Examples of realizations are given, and electrical characteristics are presented. They show a better capability of the junction termination extension periphery over the MESA technique to reach a 1500 V-blocking voltage objective,