Study on the I–V characteristics of ferroelectric thin film systems with the structure of MFSM

Ferroelectric thin film systems with multilayer structure, Au/PZT/p-Si, and Au/PZT/BIT/p-Si, were fabricated by using pulsed laser deposition (PLD) technique. Ferroelectric PZT and BIT layers with the thickness of 400 and 100 nm, respectively, were grown on (100) oriented p-type silicon substrates. Electrical properties of the metal/ferroelectric/semiconductor/metal (MFSM) structures were characterized through the measurements of bias voltage dependence of current. The conductivity behavior is discussed. The results suggest that the growth of the BIT buffer layer has decreased the serious interaction and interdiffusion in the PZT/p-Si interface. The I–V hysteresis loop is large enough to identify the current of reading ‘1’ and ‘0’, respectively, indicating that the access function is realized in our ferroelectric thin film systems.