Electrical characterization of self-assembled InAs/GaAs quantum dots by capacitance techniques

The electrical characteristics of GaAs/InAs/GaAs structures containing self-assembled quantum dots (QD) or pseudomorphic layers (PSL) of InAs have been investigated by capacitance–voltage (C–V) measurements and deep-level transient spectroscopy (DLTS). The depth profiles of the apparent electron concentration obtained by C–V measurements show significant carrier depletion centered around the position of the InAs layer on both QD and PSL samples. In contrast, an accumulation peak, whose position depends on the temperature and the test signal frequency, is detected at low temperature only on QD samples. In addition to the M1, M3, and M4 traps, which are commonly detected in GaAs grown by molecular beam epitaxy (MBE), DLTS investigations show two InAs-related levels located at 60 and 480 meV below the GaAs conduction band edge. The shallower level, which is observed only on QD samples, is associated with an energy level induced by the dots. The deeper level, detected on both QD and PSL samples, is due to defects related to the InAs insertion. The influence of the above levels on the C–V characteristics is discussed.