Suppression of boron interstitial clusters in SOI using vacancy engineering

As CMOS devices scale into the 45 nm process window, the requirements for the individual devices become even more stringent, with levels of activation well above solid solubility with minimal dopant diffusion. interstitial clusters (BICs) are known to hinder the activation of typical boron implants reducing the level of activation even below solid solubility. This paper reports on an optimised vacancy engineering technique to reduce the interstitial population, which would normally occur after ion implantation. Hence, the BIC formation is suppressed creating a highly active layer, which remains active over a 700–1000 °C temperature window. Using this technique, it has been estimated that at 700 °C the level of activation may be around 5 × 1020 cm−3 rivaling techniques such pre-amorphisation combined with solid phase epitaxy re-growth.