Title of article :
Effect of Si interlayer thickness and post-metallization annealing on Ge MOS capacitor on Ge-on-Si substrate
Author/Authors :
Yoo، نويسنده , , Ook Sang and Oh، نويسنده , , Jungwoo and Kang، نويسنده , , Chang Yong and Lee، نويسنده , , Byoung Hun and Han، نويسنده , , In Shik and Choi، نويسنده , , Won-Ho and Kwon، نويسنده , , Hyuk-Min and Na، نويسنده , , Min-Ki and Majhi، نويسنده , , Prashant and Tseng، نويسنده , , Hsing-Huang and Jammy، نويسنده , , R.A.J. and Wang، نويسنده , , Jin-Suk and Lee، نويسنده , , Hi-Deok، نويسنده ,
Issue Information :
روزنامه با شماره پیاپی سال 2008
Pages :
4
From page :
102
To page :
105
Abstract :
We demonstrated the effect of post-metallization annealing and Si interlayer thickness on Ge MOS capacitor on Ge-on-Si substrate with HfO2/TaN. Ge outdiffusion and oxygen interdiffusion were completely suppressed by thick Si interfacial layer. As a result, formation of insufficient low-k Ge oxides was effectively inhibited. It is confirmed that gate current of Si passivated Ge MOS was decreased by Si IL and decrease of gate current, Jg is saturated after Si IL of 2 nm. It was also observed that when Si IL is thick enough to restrict Ge outdiffusion, increase of Jg is not due to the temperature-induced Ge outdiffusion but due to the partial crystallization of HfO2 at higher annealing temperature.
Keywords :
GE , Si capping , Surface passivation , Post-metallization annealing
Journal title :
MATERIALS SCIENCE & ENGINEERING: B
Serial Year :
2008
Journal title :
MATERIALS SCIENCE & ENGINEERING: B
Record number :
2145996
Link To Document :
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