Strain and strain-release engineering at epitaxial SiGe islands on Si(0 0 1) for microelectronic applications

We report original finite element method simulations of the strain components at nanometric GeSi island on Si(0 0 1), for realistic shape, sizes and average composition, discussing the main mechanisms acting in the misfit strain relaxation. The tensile strain induced in a 30 nm Si capping layer and the one upon removing the island, after fixing the top part of the Si layer, is discussed in view of application as a field effect transistor channel, with high career mobility induced by the lattice deformation. The large shear components obtained for steeper island morphologies are predicted to be particularly performing, especially in comparison to one another strained-silicon configuration (totally top-down originated), recently developed by IBM corporation.