Author/Authors :
Haynes، نويسنده , , W.J. and Burch، نويسنده , , P. and Halsall، نويسنده , , R. and Melotti، نويسنده , , W. and Noyes، نويسنده , , G. and Kausch، نويسنده , , M. and Kostka، نويسنده , , P. and Pitzl، نويسنده , , D.، نويسنده ,
Abstract :
The H1 experiment consists of some half million electronics channels in an environment of 96 ns bunch crossings at the HERA e-p collider at DESY, Hamburg. The data acquisition system built to read out the silicon tracking devices is described. Several technologies are employed in integrating ASIC devices, large numbers of FADCs, fibre-optic interconnections and the latest commercial microprocessor architectures in modular bus standards such as VMEbus and the recent PCI definition. The experiences gained in system development are highlighted, which provide significant pointers to the problems posed by the next generation of hadron colliders.
