SCT128B – a prototype chip for binary readout of silicon strip detectors

We present a 128-channel prototype chip for the binary readout of silicon strip detectors which has been designed and manufactured in the radiation hard DMILL technology. The goal of this development was to demonstrate the feasibility of building in the DMILL technology, a radiation hard chip suitable for the binary readout architecture for the ATLAS SCT. A single chip comprises the front-end circuitry, the binary pipeline and the back end readout circuitry. The architecture as well as the designs of the individual blocks are discussed in the paper. Measurements confirm that full functionality of all blocks of the chip have been achieved at a clock frequency of 40 MHz, meeting the design specification.