The silicon strip detector with very large pitch: conceptual design and simulation results

The design of a combined p+ and n+ silicon strip detector is discussed, which employs a very large pitch (∼300 μm) whilst maintaining high efficiency and good resolution ( ∼50 μm). This device has been simulated using ISE-TCAD DESSIS, which allows the determination of the internal electric field and the necessary bias conditions together with the simulation of the signals which would be generated by minimum ionizing particles. Values to estimate the efficiency and resolution of the design obtained by analyzing the simulated signals are presented.