• Title of article

    Trigger Timing Module for SVD2 upgrade at Belle

  • Author/Authors

    Chang، نويسنده , , M.C. and Gao، نويسنده , , Z.W. and Guo، نويسنده , , Y.N. and Kawasaki، نويسنده , , T. and Ueno، نويسنده , , K. and Velikzhanin، نويسنده , , Y.S.، نويسنده ,

  • Issue Information
    روزنامه با شماره پیاپی سال 2003
  • Pages
    7
  • From page
    559
  • To page
    565
  • Abstract
    We have developed a Trigger Timing Module (TTM2) for the control and readout electronics (CORE) of the upgraded Silicon Vertex Detector (SVD2) for use in the BELLE experiment. Eleven Trigger Timing Modules located at one VME-crate provide timing and strobe signals for the SVD2 CORE electronics and make communication between SVD2 and Global Decision Logic of the BELLE data acquisition system. The main motivation to make a new TTM design is to avoid glitches.
  • Keywords
    FPGA , Waveform , VME , Belle , RAM
  • Journal title
    Nuclear Instruments and Methods in Physics Research Section A
  • Serial Year
    2003
  • Journal title
    Nuclear Instruments and Methods in Physics Research Section A
  • Record number

    2197911