Studies on reducing leakage current and improving breakdown voltage of large-area silicon detectors: technology and results

6×6 cm2 single-sided p+–i–n+ silicon strip detectors have been fabricated with the standard IC fabrication planar technology. Various processing techniques have been used to reduce the leakage current of the detectors and their results are presented. Different gettering processes have been implemented to remove the impurities and defects from the detector active regions. The combined approach of employing intrinsic as well as extrinsic gettering gives the best result. Incorporating special design techniques and unique back plane ohmic side processing technology has ensured stable high-voltage operation of detectors without breakdown. The special design and processing techniques have produced detectors with typical reverse bias current densities of approximately 2 nA cm−2 at VFD+150 V and breakdown voltage greater than 500 V. These technological studies have been carried out for producing silicon detectors to be mounted in Preshower detector of CMS experiment at CERN.