An FPGA-based readout electronics for neutrino telescopes

Among the various elements that form part of the electronics framework of a future underwater neutrino observatory, the readout electronics is one of the most delicate and constraining, notably in terms of power requirements, long-term reliability and cost effectiveness. s paper, an electronics developed for such a purpose is presented. First, the design constraints are outlined. The developed electronics is then described, showing its block diagram and the main functional features. Finally, some results obtained with a prototype board and some planning about future development for this device are discussed.