Author/Authors :
Aghaei, Babak Department of Computer Engineering - Malekan Branch Islamic Azad University, Malekan, Iran , Badie, Kambiz Telecommunication Research Center, Tehran, Iran , Reshadi, Midia Department of Computer Engineering - Science and Research Branch Islamic Azad University, Tehran, Iran , Khademzadeh, Ahmad Telecommunication Research Center, Tehran, Iran , Sarhangi, Saeid Department of Computer Engineering - Miandoab Branch Islamic Azad University, Miandoab, Iran
Abstract :
The Micro Packet Switched based Network on Chip (NoC) is emerged to address traditional non-scalable
buses-based Systems on Chip (SoC) challenges such as out of order transactions, flow control and higher latencies. The
NoC is disposable to a different of defects in its life which cause of such drawbacks as data missing, efficiency reduction,
and eventually, entire system overwhelm. This paper is amid to propose a new Offline-Structural Distributed Test
Mechanism (OSDTM) to discovering and emplacing shorts on the data links in NoC. The projected test approach
encompasses three main component namely Test Pattern Producer (TPP), Test Response Compiler (TRC) that are
implanted in the Network Adapter (N) as well as a Flit Comparator Block (FCB) located in the Routers(R). The FCB
concern is to detect dissimilar Flits through comparison the entrance Flits. The OSDTM leads to 100% Test Coverage
(TC), 82.3% Discovering Capability (DC), and 100% fault emplacement (FE) of faulty links in NoC. The experimental
results illustrate that the FCB hardware cost is very insignificant in related to the hardware of Vici router.
Keywords :
fault discovering and emplacement , links test mechanism , Biult in self test , Network on Chip , component