CHANNEL LOGIC ANALYSER CONTROLLER DESIGN USING FIELD PROGRAMMABLE GATE ARRAY

This paper presents a Field Programmable Gate Array (FPGA) based logic analyser controller. The controller circuit is capable of performing data acquisition and signal display on a 600x480 VGA monitor. The controller was designed using a Very High Speed Integrated Circuit Hardware Description Language (VHDL) coding and schematic capture. For validation, behavioural simulations are carried out using Xilinx ISE simulator. The synthesis and implementation of the controller onto Xilinx Spartan XC3 S200- 4FT256 FPGA chip are also presented. The motivation of this project is to explore the capability of designing a complete digital system in a single FPGA chip.