POWER ESTIMATION OF SEQUENTIAL CIRCUITS USING BACK PROPAGATION NEURAL NETWORKS

Power estimation at an earlier stage is important in Very Large Scale Integrated (VLSI) circuits, because it has a significant impact on the reliability of these circuits. Power estimation is a trade off between precision of estimation and estimation time. Simulation based power estimation techniques are time consuming. This work reports an artificial neural network based method for power estimation of International Symposium on Circuits and Systems 1989 (ISCAS’89) Benchmark circuits, by employing Back Propagation Neural Network (BPNN). This method can estimate power quickly and precisely from Inputs and Outputs (I/O) and gate information of the Very Large Scale Integrated (VLSI) circuit, without requiring detailed structure of the circuit and its interconnection. Power estimation results reported in the literature for (ISCAS’ 89) Benchmark circuits are used to the train the neural networks. The power estimate results for the tested circuits are validated by performing regression analysis. The BPNN is trained with various training functions and a comparative study on various training algorithms for power estimation is made.