Design modified architecture for MCS-51 with innovated instructions based on VHDL

This paper introduces two new complex instructions over the application with specific instruction set processor. For the MCS-51 family, utilizing a reserved bit, and the unused machine code ‘‘A5h’’ we can modify the conventional instruction set architecture (ISA) and develop two macro instructions for data manipulation. One of them is to move a block of data from specific memory locations to any other memory locations, while the other developed instruction is to obtain maximum byte-value within a group of 8-bytes and load it into the Accumulator. There are two basic steps to achieve such developments, step-1; at which we modify the architecture of the conventional microcontroller 8051 using hardware description language HDL. In the second step we modify the instruction set architecture (ISA) of lC 8051. Such development improves the performance of the lC including fast execution time, decrease machine code size, so decrease storage requirements and provide low power consumption.