• Title of article

    Register allocation for fine grain threads on multicore processor

  • Author/Authors

    kiran, d.c. birla institute of technology and science pilani - department of computer science and information systems, India , gurunarayanan, s. birla institute of technology and science pilani - department of electrical electronics and instrumentation, India , misra, janardan p. birla institute of technology and science pilani - department of computer science and information systems, India , bhatia, munish birla institute of technology and science pilani - department of computer science and information systems, India

  • From page
    85
  • To page
    92
  • Abstract
    A multicore processor has multiple processing cores on the same chip. Unicore and multicore processors are architecturally different. Since individual instructions are needed to be scheduled onto one of the available cores, it effectively decreases the number of instructions executed on the individual core of a multicore processor. As each core of a multicore processor has a private register file, it results in reduced register pressure. To effectively utilize the potential benefits of the multicore processor, the sequential program must be split into small parallel regions to be run on different cores, and the register allocation must be done for each of these cores. This article discusses register allocating heuristics for fine grained threads which can be scheduled on multiple cores. Spills are computed and its effect on speed-up, power consumption and performance per power is compared for a RAW benchmark suite.
  • Keywords
    Multicore , Compiler , Fine grain parallelism , Scheduling , Register allocation
  • Journal title
    Journal Of King Saud University - Computer an‎d Information Sciences
  • Journal title
    Journal Of King Saud University - Computer an‎d Information Sciences
  • Record number

    2713734